Junior Physical Design Engineer

Recruitment Consultant

Chris Canneaux

Contact Details

ccanneaux@eu-recruit.com +44 (0)330 335 2350

Posted

2 months ago

For this role you will be responsible for all aspects of physical design and implementation. In this role, you will participate in the efforts of establishing physical design methodologies and flow automation.
Physical Design Engineer will be part of the design development team. The candidate will work on the digital design implementation, and verification of mixed-signal ICs utilizing standard EDA tools. Products to be designed/verified include power management and mixed signal functions.

Responsibilities

Responsible for physical design, development, & verification of digital / mixed-signal IC’s
Chip & block floorplan/implementation, power/clock distribution, chip assembly, P&R, STA, & LVS/DRC to closure
Work closely with digital/analog design team for physical implementation and custom analog blocks/interface/IP’s

Requirements

Requires advanced degree in Elec Engineering/Computer Science or equivalent.
1+ years (preferred) of Physical Digital Design experience.
2+ years (preferred) ASIC design, verification, or related work experience.
Good written/verbal communication English skills and strong teamwork collaboration
Ability to work independently, follow instructions according to design specifications and execute tasks to hit milestones with quality.
Strong knowledge of ASIC development process and digital design techniques.
Experience with programming, scripting and automation languages like Perl/TCL/Unix/Python

Strong Technical Abilities & Understanding In These Areas

Verilog/System Verilog coding.
Synthesis, CTS, DFT, Extraction, and STA closure across multiple process corners.
Multipower domain, signal integrity, & power/IR drop analysis.
Linting and CDC requirements.
Expertise in both hand-written and tool-driven functional/timing ECO.
Physical Design Verification methodology to debug LVS/DRC issues at chip/block level
User of industry physical tools: Cadence Encounter/Innovus tools(preferred) or Synopsys ICC/ICC2.

Experience With The Following Is Desired

Physical SOC design including uC design(ARM/RISCV)
knowledge of power management industry/applications
I/F: I2C, SPI, USB, PMBUS, etc

Industry

Semiconductor

Contract Type

Permanent

Location

Spain

Work Model

On-Site

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